This page contains the Quartus® II University Interface Program (QUIP) Toolkit download file (QUIP Toolkit 9.0), software requirements, and other related information for the QUIP toolkit.
|Table 1. QUIP Toolkit Download File|
|Software Requirements||Download (1)||File Size|
|Quartus II Software Version 9.0 or
Quartus II Web Edition Software Version 9.0
|QUIP Toolkit 9.0
|Quartus II Software Version 6.0 or
Quartus II Web Edition Software Version 6.0
|QUIP Toolkit 6.0
- QUIP toolkit download files are in a compressed archive format.
To use the QUIP toolkit 9.0, you need Quartus II software version 9.0. To obtain the full Quartus II design software version 9.0, fill out the University Program license request form.
If you want to get started right away, download Quartus II Web Edition software version 9.0, and follow the included instructions on downloading the software and requesting a license from the automated license server.
Note: Quartus II Web Edition software does not include Chip Editor, which is referenced in the QUIP tutorial. For those portions of the QUIP tutorial that use the Chip Editor, you can use the Quartus II Floorplan Editor (which is enabled in the Quartus II Web Edition software) as an alternative.
Also note that if your research requires FPGAs (such as Stratix® and Cyclone® devices) or FPGA development boards (such as the Nios® II Development Kit, Stratix Edition), the Altera® University Program offers teaching and development boards to university researchers at heavily discounted rates, and sometimes as grants.
In addition to the tutorials, this release consists of documentation, device files, and executable code that contain details on different aspects of the Quartus II design flow, interfaces into and out of the flow, and information about the Altera FPGAs that Quartus II software targets. It also includes software interfaces to automatically collect the data needed to create design tools that plug into the flow. These files and applications are grouped into separate directories, the contents of which are summarized in the following sections:
As shown in Table 2, there are two tutorials in this release.
|Table 2. Tutorials|
|tutorials/quartus_tutorial/quartus_tutorial.pdf||The Quartus II tutorial. Provides a good starting point for users new to Quartus II software.|
|tutorials/quip_tutorial/quip_tutorial.pdf||The QUIP tutorial. Provides a good starting point for users familiar with Quartus II software, or those who have already gone through the quartus_tutorial.pdf file. Shows the basic ways of interfacing with the software at different stages in the design flow.|
QUIP documentation provides useful reference information and describes the QUIP Toolkit interfaces. All documents are located in the documents directory.
Reference Data and Source Files
The reference data and source files listed in Table 3 provide the architecture specification and timing information needed to develop valid and effective design tools for Altera devices.
|Table 3. Reference Data and Source Files|
|Full Specifications of Altera Device Architectures for Stratix and Cyclone Series Families||
Provided in XML format and located in the data/architectures directory.For detailed descriptions of how to parse these files, see altera_xml_architecture_description_file_detailed_design.pdf in the documents directory.
|Intra-Cell Timing Information for Stratix and Cyclone Series Families||
Provided in XML format and located in the data/intracelldelays directory.For a detailed description of how to parse these files, see altera_xml_point_to_point_delay_file_detailed_design.pdf, in the documents directory.
|Inter-Cell Timing Information for Stratix and Cyclone Series Families||
Provided through a software interface known as the Placer Delay Model (PLDM), this information represents a simple to use C-software interface that provides all inter-cell timing information.The source files and reference data are located in the data/intercelldelays directory.
The interactive examples listed in Table 4 show how to use some of the key interfaces to the Quartus II design flow.
|Table 4. Interactive Examples|
|How to Specify and Alter Routing for an Altera Design||The example is used in conjunction with the constrained_routing_tutorial_and_reference.pdf document. All necessary source files are located in examples/constrained_routing.|
|How to Use the PLDM Software Interface to Retrieve Inter-Cell Timing Information for Altera Devices||This example shows how to work with the provided software API. The necessary source files are located in examples/api_demo/demos_quip.tar.gz. Expand the archive and view the red_readme.txt file for full instructions on using the demo.|
|How to Extract Architecture and Intra-Cell Timing Information from the Provided XML Files||This demonstration provides a C++ example of how to parse the provided XML files and obtain important information. The demonstration is also provided in the examples/api_demo/demos_quip.tar.gz archive. Expand the archive and view the pdemo_readme.txt file for full instructions on using the demo.|
The QUIP Toolkit contains an updated set of reference designs as well as documentation that describes benchmarking methodologies and best practices.
In an effort to keep the QUIP benchmarks current, complete, and fair, we encourage academics and industry professionals to submit designs that would be good additions to the set. We also welcome any feedback regarding the current set of benchmark circuits. We will work hard to integrate your designs and feedback into future releases of the QUIP toolkit.
The benchmark circuits are located in the benchmarks directory.
The development utilities listed in Table 5 facilitate development and research with Altera devices.
|Table 5. Development Utilities|
|Automatic Conversion from Academic Netlist Formats to Altera-Compatible Netlists||The Net to VQM utility accepts as input a .net netlist compatible with the popular academic Versatile Place and Route (VPR) tool and provides as output a Verilog-to-Quartus (VQM) netlist that is compatible with Quartus II design software. The source code for the utility is provided in the utils/nettovqm directory. For full instructions on using Net to VQM, see the file README_nettovqm.txt in the same directory.|
You can contact the QUIP support team via email at email@example.com or by posting a question to the comp.arch.fpga news group.
We can answer questions about how to use the QUIP toolkit, and if you have suggestions about extra information that would be useful to you in future versions of the toolkit, we are interested in hearing them. Additionally, if you are doing a research project that uses Quartus II software or another Altera product, we may be interested in financially supporting the research.
All files in the QUIP download archive are the copyrighted property of Altera Corporation, San Jose, California, USA. All rights reserved.
Your use of the Quartus II development software is expressly subject to the terms and conditions of the Quartus II Program License Subscription Agreement or other applicable license agreement. Please refer to the applicable agreement for further details.
The design examples, code examples, documentation, and data files contained in the QUIP download archive are being provided on an "as-is" basis and as an accommodation and therefore all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES, OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT, OR OTHERWISE, ARISING FROM, OUT OF, OR IN CONNECTION WITH THE QUIP DOWNLOAD ARCHIVE.