OpenCL 2D Fast Fourier Transform Design Example

This example demonstrates an Open Computing Language (OpenCLTM) implementation of a 2D fast Fourier transform (FFT). The example processes a 2D matrix of 1,024x1,024 complex single-precision floating-point values. The 2D FFT is decomposed into a 1D FFT applied to each row followed by a 1D FFT applied to each column.

The core kernel of this example performs a 1D FFT and a transposition of the matrix. The host program invokes this 1D FFT kernel twice to complete the 2D transformation. There are many optimizations included in this example including a comparison of two different output data layouts where one data layout performs 60 percent better. Additional details are provided in the example package.

 

2D FFT Performance

Output data layout GFLOPS
Ordered31
Optimized50

Features

  • Channels vendor extension
  • Memory access pattern optimizations
  • Multiple simultaneous kernels
  • Mix of single work-item and NDRange kernels

Downloads

The design example provides source code for the OpenCL device (.cl) as well as the host application. For compiling the host application, the Linux package includes a Makefile and the Windows package includes a Microsoft Visual Studio 2010 project.

The following downloads are provided for this example (v17.0 example comping soon):

The use of this design is governed by, and subject to, the terms and conditions of the hardware reference design license agreement.

Software and Hardware Requirements

This design example requires the following tools:

  • Intel® FPGA Software v16.1 or later
  • Intel® FPGA SDK for OpenCL™ v16.1 or later
  • On Linux: GNU Make and gcc
  • On Windows: Microsoft Visual Studio 2010

To download the Intel design tools, visit the OpenCL download page. The requirements for the underlying operating system are the same as those of the Intel FPGA SDK for OpenCL.

OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.

* Product is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.

Design Examples Disclaimer

These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.