The TimeQuest timing analyzer is an ASIC-strength static timing analyzer that supports the industry-standard Synopsys® Design Constraints (SDC) format. This page provides links to resources where you can learn more about the TimeQuest analyzer.
For resources on the TimeQuest analyzer, see the following:
For a brief overview of the TimeQuest timing analyzer, refer to the TimeQuest Timing Analyzer section on the Verification and Board Level product feature page.
To search for known TimeQuest issues and technical support solutions, use Altera's Knowledge Database. You can also visit the Altera® Forum to connect to and discuss technical issues with other Altera users.
For further technical support, use mySupport to create, view, and update service requests.
TimeQuest Analyzer Resources