Memory Test

Memory Test tests the connection of a Nios® II system to RAM and flash. In addition, it demonstrates the use of the direct memory access (DMA) controller peripheral and Nios II flash programming application program interface (API).

The RAM portion of the test prompts you for the start and end address of the RAM that is to be tested. Once valid start and end address entries are made, the RAM test routine performs the following operations:

  • Tests the address and data lines for shorts and opens
  • Tests byte and half-word access
  • Tests every bit in the memory to store both '1' and '0'
  • Checks if there is a DMA component available in the system
  • If a DMA component exists, the routine tests its access to the memory

IMPORTANT: The RAM test is destructive to the contents of the RAM. For this reason, you must make absolutely sure that none of the software sections are located in the RAM being tested. This means all code, data, and exception locations must be in a memory separate from the one being tested. You can adjust these locations in the Nios II integrated development environment (IDE) and SOPC Builder.

The flash tests demonstrate the use of the flash programming API. After the flash device specified is opened, the test routine searches for a block in the device that is already erased. This prevents any overwriting of important data that may be programmed in flash. When an erased block is found, the routine performs a test of the flash API calls on that block.

The following API functions are then run to test the flash interface:

  • alt_get_flash_info: This function queries the flash device and collects various information about it. In the example, the results of this query are compared to what is expected, and an error is reported in the event of a mismatch.
  • alt_write_flash: This function writes a specified number of bytes to the flash device. In the example, this function is called repeatedly in a loop to write a lengthy amount of data.
  • alt_read_flash: This function reads a specified number of bytes of data from the flash device. In the example, alt_read_flash reads back and tests all of the writing routines.
  • alt_erase_flash_block: This function performs a block erase on the flash device.
  • alt_write_flash_block: This function writes an erased block of data to the flash device.

During the test, status and error information is passed to the user via printfs.

Using This Design Example

To obtain this design example, download a free evaluation version of the Nios II Embedded Design Suite (EDS). This embedded software example is installed with the Nios II EDS in the <Nios II EDS installation path>/examples/software directory and is available as a Nios II integrated development environment (IDE) project template. The template includes the project settings required to run this design on the supported target hardware configurations. To use this software example, simply create a new C/C++ application project in the IDE and choose the desired project template.

The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.

Hardware Requirements

This example requires the following devices to be present in the target hardware design:

  • STDOUT component such as a UART or JTAG UART
  • Common flash interface (CFI) compliant flash component
  • DMA component (optional)

You can run this software design example on the following Nios II hardware design examples:

Nios II Development Board, Stratix® II Edition:

  • Standard (DMA RAM test will not run)
  • Full Featured

Nios II Development Board, Stratix Professional Edition:

  • Standard (DMA RAM test will not run)
  • Full Featured

Nios II Development Board, Stratix Edition:

  • Standard (DMA RAM test will not run)
  • Full Featured

Nios II Development Board, Cyclone® Edition:

  • Standard (DMA RAM test will not run)
  • Full Featured

DSP Development Board, Stratix II Edition:

  • Standard (DMA RAM test will not run)
  • Full Featured

Design Examples Disclaimer

These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.