The MicroC/OS-II with the Nios® II processor design example shows the usage of the MicroC/OS-II real-time operating system with the Nios II processor. The hardware is the prebuilt design of the Nios II Ethernet Standard Hardware Design Example. The software design features the basics of the MicroC/OS-II operating system, including the usage of message queue and semaphore.
Using This Design Example
This design example is based on the system constructed in the Using MicroC/OS-II RTOS with the Nios II Processor Tutorial (PDF).
MicroC/OS-II Tutorial Design Files (ZIP) contains the prebuilt hardware design and C files required to run the design as explained in the document.
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
The prebuilt hardware design in this example is based on the Nios II Embedded Evaluation Kit (NEEK) version of the Nios II Ethernet Standard Hardware Design Example.
Design Examples Disclaimer
These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.