Intel® Stratix® 10 BSDL Files

Browse boundary-scan description language (BSDL) files by specific devices and choose the appropriate device package. The same BSDL file can be used regardless of speed grade or temperature.

IEEE 1149.6 Compliant Stratix 10 ES1 Device BSDL Files (1)
Device Package File Code Version
1SG210 H-tile (3) 1760-pin FineLine BGA 1SG210HNF43S1 1.01
2397-pin FineLine BGA 1SG210HUF50S1 1.01
1SG280 H-tile (2) 1760-pin FineLine BGA 1SG280HNF43S1 1.01
2397-pin FineLine BGA 1SG280HUF50S1 1.01
2912-pin FineLine BGA 1SG280HHF55S1 1.01
1SG280 L-tile (3) 1760-pin FineLine BGA 1SG280LNF43S1 1.01
2397-pin FineLine BGA 1SG280LUF50S1 1.01
2912-pin FineLine BGA 1SG280LHF55S1 1.01
1SX280 H-tile (2) 1760-pin FineLine BGA 1SX280HNF43S1 1.01
2397-pin FineLine BGA 1SX280HUF50S1 1.01
2912-pin FineLine BGA 1SX280HHF55S1 1.01
1SX280 L-tile (2) 1760-pin FineLine BGA 1SX280LNF43S1 1.01
2397-pin FineLine BGA 1SX280LUF50S1 1.01
2912-pin FineLine BGA 1SX280LHF55S1 1.01
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IEEE 1149.6 Compliant Stratix 10 ES2 Device BSDL Files (1)
Device Package File Code Version
1SG280 H-tile (2) 1760-pin FineLine BGA 1SG280HNF43S2 1.02
2397-pin FineLine BGA 1SG280HUF50S2 1.02
2912-pin FineLine BGA 1SG280HHF55S2 1.02
1SG280 L-tile  (3) 1760-pin FineLine BGA 1SG280LNF43S2 1.02
2397-pin FineLine BGA 1SG280LUF50S2 1.02
2912-pin FineLine BGA 1SG280LHF55S2 1.02
1SX280 H-tile (2) 1760-pin FineLine BGA 1SX280HNF43S2 1.01
2397-pin FineLine BGA 1SX280HUF50S2 1.01
2912-pin FineLine BGA 1SX280HHF55S2 1.01
1SX280 L-tile (2) 1760-pin FineLine BGA 1SX280LNF43S2 1.01
2397-pin FineLine BGA 1SX280LUF50S2 1.01
2912-pin FineLine BGA 1SX280LHF55S2 1.01
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IEEE 1149.6 Compliant Stratix 10 ES3 Device BSDL Files (1) (2)
Device Package File Code Version
1SG280 L-tile        1760-pin FineLine BGA 1SG280LNF43S3 1.01
2397-pin FineLine BGA 1SG280LUF50S3 1.01
2912-pin FineLine BGA 1SG280LHF55S3 1.01
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IEEE 1149.6 Compliant Stratix 10 BSDL Production Device Files (1) (2)
Device Package File Code Version
1SG085 H-tile 1760-pin Fineline BGA 1SG085HNF43 1.00
1SG110 H-tile 1760-pin Fineline BGA 1SG110HNF43 1.00
1SG165 H-tile      1760-pin FineLine BGA 1SG165HNF43 1.01
2397-pin FineLine BGA 1SG165HUF50 1.01
1SG210 H-tile 1760-pin FineLine BGA 1SG210HNF43 1.01
2397-pin FineLine BGA 1SG210HUF50 1.01
1SG250 L-tile 1760-pin FineLine BGA 1SG250LNF43 1.01
2397-pin FineLine BGA 1SG250LUF50 1.01
2912-pin FineLine BGA 1SG250LHF55 1.01
1SG250 H-tile 1760-pin FineLine BGA 1SG250HNF43 1.01
2397-pin FineLine BGA 1SG250HUF50 1.01
2912-pin FineLine BGA 1SG250HHF55 1.01
1SG280 L-tile 1760-pin FineLine BGA 1SG280LNF43 1.01
2397-pin FineLine BGA 1SG280LUF50 1.01
2912-pin FineLine BGA 1SG280LHF55 1.01
1SG280 H-tile 1760-pin FineLine BGA 1SG280HNF43 1.01
2397-pin FineLine BGA 1SG280HUF50 1.01
2912-pin FineLine BGA 1SG280HHF55 1.01
1SX085 H-tile 1760-pin Fineline BGA 1SX085HNF43 1.00
1SX110 H-tile 1760-pin Fineline BGA 1SX110HNF43 1.00
1SX165 H-tile 1760-pin FineLine BGA 1SX165HNF43 1.01
2397-pin FineLine BGA 1SX165HUF50 1.01
1SX210 H-tile 1760-pin FineLine BGA 1SX210HNF43 1.01
2397-pin FineLine BGA 1SX210HUF50 1.01
1SX250 L-tile 1760-pin FineLine BGA 1SX250LNF43 1.01
2397-pin FineLine BGA 1SX250LUF50 1.01
2912-pin FineLine BGA 1SX250LHF55 1.01
1SX250 H-tile 1760-pin FineLine BGA 1SX250HNF43 1.01
2397-pin FineLine BGA 1SX250HUF50 1.01
2912-pin FineLine BGA 1SX250HHF55 1.01
1SX280 L-tile 1760-pin FineLine BGA 1SX280LNF43 1.01
2397-pin FineLine BGA 1SX280LUF50 1.01
2912-pin FineLine BGA 1SX280LHF55 1.01
1SX280 H-tile 1760-pin FineLine BGA 1SX280HNF43 1.01
2397-pin FineLine BGA 1SX280HUF50 1.01
2912-pin FineLine BGA 1SX280HHF55 1.01
1SM110 H-tile 1760-pin Fineline BGA 1SM110HNF43 1.00
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(1) The BSDL Files are syntax checked using these tools:

  1. JTAG Technologies
  2. ASSET Intertech - Agilent Technologies
  3. Corelis
  4. Goepel electronic

(2) You must execute the MISCCTRL instruction to enable the boundary-scan circuitry in Intel Stratix 10 devices.

Example 1. MISCCTRL Instruction

SIR 10 TDI (013);
STATE IDLE;
SDR 8 TDI (01);

    (3) You must use pre-amble sequence to enable the boundary-scan circuitry as documented in the ES guideline for these devices

 

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Questions or concerns about the contents of these files, can be directed to Altera's mySupport.

For information on boundary-scan testing, refer to the Related Documents links on Altera BSDL Support page.