Type: Answers
Area: Tools


Last Modified: February 02, 2015

Why does my bidirectional pin drive out '1' instead of 'Z' when the data port is connected to a constant zero in my design?

Description

Due to a problem in the Quartus® II software versions 14.1 and earlier you may see functional problems if you connect the data port of a bidirectional pin to a constant zero in your design as the OE and IN ports for the bidirectional buffer may be switched. 

 

Workaround/Fix

Use the "keep" attribute to preserve the constant wire as shown in the code below:

For VHDL:

signal const_zero_sig : std_logic;

attribute keep: boolean;
attribute keep of const_zero_sig: signal is true;

begin

const_zero_sig <= \'0\';

TRI_PIN <= const_zero_sig when ENABLE=\'1\' else \'Z\';

For Verilog:

wire const_zero_sig /* synthesis keep */;

assign const_zero_sig = 1\'b0;
assign TRI_PIN = enable? const_zero_sig : 1\'bz;


This problem is scheduled to be resolved in a future release of the Quartus II software.