Type: How-To
Area: Component


Last Modified: September 11, 2012

Why does the Nios II Processor Flash controller not find the EPCS registers and fail when trying to program the flash?

Description

The JTAG debug module in the Nios® II Processor asserts the reset output to clear registers in the flash controller during the controller detection phase.  Detection can fail if the registers are not seen to be in their default state.

Ensure the jtag_debug_module_reset output from the Nios II Processor is connected to the EPCS Serial Flash Controller reset input.