If you're using 16.0.2 Arria10 BSP with PR, you may encounter that an execution of an OpenCL host application shows an incorrect behavior. It is a very rare and non-deterministic issue.
It appears only when FPGA is programmed via PR and then running the host code for multiple times in sequence. Full chip JTAG programming doesn't show this issue.
You can apply one of the following workaround.
1) Re-run the host executable when failure is detected. This issue is non-persistent. It doesn't require reprogramming of the device.
2) Use JTAG programming instead of PR to program .aocx files on Arria10 devices. To use JTAG programming as a work around:
Set environment variable "export ACL_PCIE_USE_JTAG_PROGRAMMING=1" on the Linux/Windows host