Article ID: 000085430 Content Type: Troubleshooting Last Reviewed: 01/01/2015

Why does my Cyclone V SOC board fail to boot from QSPI or FPGA?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description The SoC Dev Kit Reference Manual Table 2-11, incorrectly documents the boot source settings for QSPI and FPGA.   
    Resolution

    The correct settings are documented in the Cyclone® V Device Handbook, Volume 3: Hard Processor System Technical Reference Manual, Section VIII, A. Booting and Configuration

    The correct settings are also shown below:

    0x1 - booting from FPGA

    0x7 - booting from QSPI

    This problem will be resolved in a future release of the documentation.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices