Article ID: 000078101 Content Type: Troubleshooting Last Reviewed: 10/15/2014

What can cause my PCI Express bus to hang while transmitting?

Environment

  • PCI Express
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    If you send a TLP with a payload size greater than the maximum supported system-level Max Payload Size the link will fail to operate.

    You should qualify your TLPs with Max Payload Size in tl_cfg_ctl address 0, cfg_dev_ctrl[7:5], otherwise the link will fail to operate due to incorrect packet sizes.

    A SignalTap®  capture with many assertions and de-assertions of tx_st_ready per TLP and no EOP is a symptom of this error.

    Resolution Ensure that both hardware and software are abiding by the PCI Express®  specification to only send TLPs up to the Max Payload Size or Max Read Request Size.

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