Article ID: 000082425 Content Type: Troubleshooting Last Reviewed: 01/01/2015

Why do I get an Error message when I try to compile my transceiver application design running at ≥ 2.97Gbps data rate in the Quartus II software versions 10.1 or 10.1 SP1?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to updated pin connection guidelines for Cyclone® IV GX transceiver applications running at . 2.97Gbps data rate, you may see an error message when compiling these designs in the Quartus® II software versions 10.1 and 10.1 SP1.

    First follow the guidelines in the Cyclone IV Device Family Pin Connection Guidelines (PDF) if you are designing transceiver application running at . 2.97Gbps data rate. After following the guidelines, an additional patch is required for the Quartus II software versions 10.1 and 10.1 SP1. Download and install the appropriate patch from the links below:

    Related Products

    This article applies to 1 products

    Cyclone® IV GX FPGA