Article ID: 000078385 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Are there any know problems with the PCI slots on the Excalibur™ XA10 Rev 3.0 DDR development board?

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Description Yes. There are clock skew problems with the PCI slots on the Excalibur XA10 Rev 3.0 DDR development board. The skew is caused by the insertion of a MAX device that is used to route clocks on the development board.  The purpose of the MAX device is to compensate for an errata item for the Excalibur ARM-based XA10 device.  Since the release of the board there has been a software fix for the errata and therefore the MAX device is no longer required and should be bypassed if the application requires the use of the PCI slots.  The output clock from the MAX device that feeds the PCI slots should be placed in a high impedance state. A wire should be run from the 32 Mhz clock input to the MAX device and tied to test point clk3(tp-clk3).  Please contact Altera Applications for additional details on this fix.

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