Description
You can add your own customized entity to a DSP Builder design by performing the following steps:
- Define a customized entity in a hardware description language (HDL) file.
- Declare synchronous clear (
sclr) and clock as inputs in the entity, regardless of whether your design uses a sclr and a clock. These inputs will be routed to a global clock pin and a global synchronous clear pin. If the entity does not need a clock and/or a global synchronous clear, still declare these signals as inputs and leave them unconnected. - Create an .mdl file and store it in the same directory as the HDL file from Step 1.
- Create a subsystem block in the MDL file and assign it the same name as the customized entity.
- Assign the inputs and outputs of the subsystem block the same name as the inputs and outputs of the customized entity. You do not have to create inputs in the subsystem block for sclr and clock.
- Within the subsystem block, connect all of the inputs and outputs to Altbus blocks of type "Black Box Input Output."
- Within the subsystem block, describe the functionality of the customized entity. To describe the functionality of the customized module you can use any block from the libraries available (i.e., the Simulink library, the Altera® library, the Communications Blockset library, etc.).