Designing with DSP Builder Advanced Blockset (IDSP220)

8 Hours Instructor-Led / Virtual Class Course

Course Description

Learn the timing-driven Simulink® design flow to implement high-speed DSP designs. This course focuses on implementing DSP algorithms using the advanced blockset capability of DSP Builder—an interface between Quartus® II software & MATLAB® and Simulink tools from The MathWorks. You'll analyze & design your DSP algorithm using the DSP Builder advanced blockset in MATLAB & Simulink. You'll explore architecture & performance tradeoffs with system-level constraints. Also you'll verify functionality & performance of generated hardware in the Quartus II software. Finally, you'll speed design time by incorporating ready made ModelIP cores in your design.

At Course Completion

You will be able to:

  • Implement DSP algorithms using Altera® DSP Builder Advanced Blockset
  • Incorporate ModelIP and ModelPrim cores in a design
  • Explore design architecture and performance tradeoffs using system level constraints
  • Incorporate a DSP Builder Advanced Blockset model into a Qsys subsystem
  • Verify the hardware performance and implementation in Quartus II software

Skills Required

  • Familiarity with DSP fundamentals and design
  • Familiarity with Altera® Quartus II software is helpful, but not necessary
  • Familiarity with MATLAB and Simulink from MathWorks is helpful, but not necessary
  • Familiarity with digital modem design is helpful, but not necessary

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Related Courses

Below are the related courses you may be interested in:

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

No class is being offered at this time.