Stratix® 10 HyperFlex™ 结构介绍 (Chinese Version of Stratix® 10 HyperFlex™ Architecture Overview) (OCS10ARCH)

22 Minutes Online Course

Course Description

在Stratix® 10 HyperFlex™结构介绍课程中,您将会了解到Intel® Stratix 10 FPGA中崭新的结构,与传统的FPGA结构相比较,它能让你的设计性能提高一倍。 您还可以学到Hyper-Register这种最基本的HyperFlex结构,以及基于Hyper-Register结构的三种新的设计方法,分别是:Hyper-Retiming,Hyper-Pipelining,Hyper-Optimization

At Course Completion

You will be able to:

  • 了解Intel® Stratix® 10 HyperFlex™ 结构,包括Hyper-Register和可编程时钟树
  • 了解Hyper-Retiming,Hyper-Pipelining和Hyper-Optimization这三种优化性能的技术,从而让您的Stratix10设计获得两倍或更高的性能提升

Skills Required

  • 熟悉FPGA/CPLD设计流程
  • 熟悉FPGA架构

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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