Mitigating Soft Errors in DRAM Through Error Correction Code on SoC FPGAs

Available Now, On-Demand
Length: 13 minutes

Gone are the early days of embedded design when a few kilobytes of static RAM was all that was needed. Today’s applications reap the benefits of integration and functionality, but leave you with challenges once reserved for high-performance computing such as soft errors. As the memory in embedded systems grows, you will need to pay more attention to soft errors.

Watch this webcast to learn why mitigating soft errors through error correction code (ECC) can improve your embedded designs:

  • Understand the potential sources and implications of soft errors.
  • Get insights on what makes embedded systems sensitive to soft errors.
  • Learn how Altera designed its SoC FPGA products to greatly improve resilience of systems against soft errors.

White paper: Error Correction Code in SoC FPGA-Based Memory Systems

Presenter:
Hans Spanjaart
Hans Spanjaart,
Sr. Technical Marketing Manager, Embedded Products, Altera Corporation


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