Implementing Floating-Point DSP in an FPGA

Available Now, On-Demand
Length: 30 minutes

Are you finding it challenging to efficiently implement floating-point digital signal processing (DSP) algorithms? Learn how Altera’s new floating-point design flow makes it easy and enables your designs to achieve high performance and efficiency.

Watch this webcast to find out about:

  • How Altera® FPGAs solve floating-point challenges
  • Altera’s model-based tool flow using our DSP Builder Advanced Blockset and the MATLAB and Simulink tools from MathWorks
  • Two third-party white papers from BDTI, an independent technology analysis firm, that analyze our floating-point DSP design flow for performance and energy efficiency

Download white papers:

Presenter:
Udayan Sinha
Udayan Sinha,
Product Marketing Engineer,
Software and DSP Marketing

View Free Webcast

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