Low-Cost DSP Solutions in Cyclone II Devices

You can use Cyclone® II FPGAs alone or as digital signal processing (DSP) coprocessors to improve price-to-performance ratios for DSP applications including video and image processing, communications systems, and common DSP functions. Cyclone II devices include an optimized set of DSP features and are supported by Altera's full set of DSP flows. Cyclone II DSP support includes:

  • Up to 150 18 x 18 multipliers
  • Up to 1.1 Mbits of on-chip embedded memory
  • High-speed interfaces to external memory
  • DSP intellectual property (IP) cores
  • DSP Builder interface to The MathWorks' Simulink and MATLAB software
  • Video Development Kit, Cyclone II Edition

Cyclone II devices are ideal for low-cost DSP applications (shown in Table 1).

Table 1. Cyclone II DSP Applications

Applications
Broadcast and Consumer Wireline and Wireless Communications
  • Plasma Displays
  • HDTV
  • Set-Top Boxes
  • Cameras
  • Audio/Visual Conference Equipment
  • HDTV Camcorders
  • Wireless Basestations
  • Digital Subscriber Line Access Multiplexer (DSLAM) Systems
  • Wireless LAN Access Point
Automotive Military, Industrial, and Medical
  • Navigation Systems
  • Satellite Radio Receiver
  • Hybrid Television Receiver
  • Telematics
  • Entertainment
  • Medical Imaging (e.g., MRI, X-ray)
  • Video Displays
  • Video Surveillance
  • Radars
  • Software Defined Radio
  • Network Test Equipment

Learn more about how Cyclone II FPGAs can fit into your applications.

Embedded Multiplier Details

The embedded multipliers in Cyclone II FPGAs are capable of implementing the simple multiplication operation commonly used in typical DSP functions. Each embedded multiplier (shown in Figure 1) can be configured as one 18-bit x 18-bit multiplier or two 9-bit x 9-bit multipliers.

Figure 1. Embedded Multipliers in Cyclone II Devices

The embedded multiplier supports both signed and unsigned multiplication. It also offers optional input and output registers for increased performance.

The embedded multipliers are also seamlessly integrated with the embedded memory blocks in Cyclone II devices to provide an efficient implementation of DSP algorithms that uses both multiplication and memory operations, such as finite impulse response (FIR) filters and video processing. Table 2 shows the number of multipliers available in Cyclone II devices.

Table 2. Number of Multipliers Available in Cyclone II Devices (1)

Device LEs 18-bit x 18-bit Multipliers 9-bit x 9-bit Multipliers
EP2C5 4,608 13 26
EP2C8 8,256 18 36
EP2C20 18,752 26 52
EP2C35 33,216 35 70
EP2C50 50,528 86 172
EP2C70 68,416 150 300
Notes:
  1. The number of multipliers in the two columns is not additive (that is, the EP2C5 device offers 13 18-bit x 18-bit multipliers or 26 9-bit x 9-bit multipliers, but not both).

Embedded Multiplier Performance

Capable of running at 250 MHz, the embedded multipliers in Cyclone II devices eliminate the performance bottleneck in complex arithmetic calculations and increase overall DSP system throughput by orders of magnitude. Cyclone II devices can be used as FPGA coprocessors for DSP applications that offload complex arithmetic computations from the DSP processor and boost overall system performance for lower system costs.