Intel FPGA IP for Triple-speed Ethernet supports the 10 Mbps, 100 Mbps, and 1 Gbps data rates on all Intel FPGA families. This IP is offered in MAC-only (to connect to external PHY chips) or MAC+PHY mode using SGMII protocol.
The Intel FPGA IP for 10G Ethernet IP portfolio contains various IP types to support data rates from 1G to 10G.
When a single 10G is not enough bandwidth, the two most obvious paths are to use multiple 10G channels or increase the data rate to 25G.
The Intel FPGA IP for 40G Ethernet IP core implements the MAC and PHY function using 4x10G lanes with KR4 and CR4 support for backplane connectivity as well as IEEE 1588v2 support for high-accuracy time synchronization.
The Intel FPGA IP for 50GE has a flexible design to support 4x12.5G or 2x25G PCS modes.
The latest in Ethernet protocols to be widely adopted is the 100G protocol. The 100G IP leverages multiple channels at either 10G or 25G. Intel offers 100G Ethernet for CAUI and CAUI-4 with backplane support and time synchronization with IEEE 1588v2 support.
400G Ethernet is here. Intel has demonstrated 400G Ethernet capability since 2013, well ahead of the industry.
400G Ethernet is the logical progression from 100G Ethernet. Today's implementations of 400G are actually four instances of 100G Ethernet with the four 100G Ethernet channels passing independent traffic. Providing four 100G Ethernet is relatively straightforward and common practice in high-end communications network infrastructure.
The true next generation of Ethernet is a single 400G datapath using 16 channels at 25G. Intel is ahead of the industry with a 400G hardware implementation of our IP showcased in 2013 as seen in this video.