Programmable logic controllers (PLCs) are at the heart of a factory control network. They are configured around an application processor that runs the factory control software along with any master communication protocol stack. Besides the processor, the PLC architecture requires support for multiple specialized peripherals, backplanes, and other custom interfaces, typically implemented using an FPGA.
Intel® SoCs provide a unique platform that allows you to implement both the application processor and FPGA in a single device.
An Intel SoC:
- Runs the PLC application software, Ethernet master protocol stack, and motion control software through the SoC’s dual-core ARM* Cortex*-A9 processor in Synchronous Multi Processing (SMP) or Asynchronous Multi Processing AMP mode
- Implements most peripherals, including USB, CAN, Ethernet, timers, and UARTs, required by the PLC system processor using the SoC’s hard processor system (HPS)
- Implements specialized peripherals such as multiport Ethernet switches and TCP/IP offload using the FPGA fabric
- Implements Human Machine Interface (HMI) in the FPGA fabric
- Implements IoT Cloud Server on SoC connecting to Enterprise over OPC-UA
- Implements Crypto Acceleration Engine for Open SSL in FPGA fabric
Rich Human Machine Interface (HMI) including 3-D graphical user interfaces (GUI) with touch-screens is ubiquitous in today’s PLC designs enabling ease of operation and maintenance, operator training, information availability and safety. Designing in a separate application processor for HMI operations is both expensive in terms of component cost and wasteful in terms of chip-to-chip data communication and resulting delay or latency between the HMI processor and the PLC processor. Using the hard processor system (HPS) of an SoC can mitigate both these problems but is wasteful in terms of processor cycles need to execute high-performance graphics.
HMI in FPGA Fabric Offloads Hard Processor System
Intel HMI solutions leverage the FPGA fabric, quite exclusive of the hard processor system. This approach not only enables integration of the HMI in the same SoC as the PLC but frees up the HPS from HMI related graphics computations by performing graphic acceleration and touch screen functions entirely in the FPGA fabric.
Drag-n-drop Symbol Library with CODESYS Integration
Intel HMI solution in the form of JMobile Studio Graphics Editor from Exor International for Cyclone® V SoC integrates directly with CODESYS PLC from 3S Software GmbH and provides an extensive symbol library to enable drag-n-drop HMI, building effective graphic interfaces for efficient representation of information making it easy to develop process control application using the integrated CODESYS PLC and HMI.
Among other things, Intel HMI solution implemented in the FPGA fabric supports the following functions:
- Active matrix display refresh (TFT, Plasma, AMOLED)
- Display power-up sequence control
- 32x32 to 8192x4096 display resolution, up to 16,777,216 colors
- 8,16 or 24 bit data output
- Multiple frame buffers
- Internal pixel clock generator
- RGB8, RGB16, RGB32, ARGB32 frame buffer formats
- Multi-layer window and overlay image assembly
- Variable frame buffer geometry per layer
- Standard overlay with color-key transparency
- Alpha blending with per-layer fading
- Alpha mask layer support
- Support Backlight control and dimming
OPC is the interoperability standard for the secure and reliable exchange of data in the industrial automation space and in other industries. It is platform independent and ensures the seamless flow of information among devices from multiple vendors. The OPC Foundation is responsible for the development and maintenance of this standard. The OPC Unified Architecture (UA), released in 2008, is a platform independent service-oriented architecture that integrates all the functionality of the individual OPC Classic specifications into one extensible framework.
Intel single-chip PLC design from Intel-partner Exor International integrates PLC, HMI, Gateway and Cloud server in a single Cyclone V SoC, with secure communications with Enterprise over OPC-UA. Security and encryption is enabled over Open SSL with cryptographic acceleration IP from Intel-partner Barco-Silex.
Build Security into your PLC application with easy to integrate security and cryptography IP cores from Intel-partner Barco-Silex. FPGA fabric based implementation offers high performance and enhanced security, while scalable IP core footprint enables tailoring to suit customized needs.
BARCO Security SoC Solution for Cyclone V SoC provides:
- API for custom OS or bare-metal programming
- Linux kernel drivers
- OpenSSL integration
- Hardware acceleration
- Symmetric: AES, SHA, DES
- Public key: RSA, ECC
- True Random Generator
- AXI* interface for easy integration
With up to 4X performance improvement over processor-based encryption, Intel FPGA fabric-based security IP implementations enable significantly better bandwidth utilization for secure M2M and Enterprise communications.