The VF360 is a 3U OpenVPX module that leverages on Altera Stratix® V FPGA and Texas Instruments KeyStone Multicore DSP technology to provide an ultra-high bandwidth processing platform, ideally suited for computation and bandwidth intensive applications such as Radar, Networking, SIGINT, EW, SDR and Video. The onboard multicore DSP from Texas Instruments provides the flexibility to perform complex post processing functions more suited for the processor domain. High bandwidth communication between the DSP and FPGA is provided through both PCIe and Serial Rapid IO (SRIO) interfaces. The Stratix® V FPGA has two banks of dedicated DDR3 and QDRII+ memories for algorithms with high bandwidth and/or large memory size requirements. Highspeed serial interfaces to the OpenVPX data plane and the FMC site creates abundant FPGA IO throughput. The VF360 acts as an FMC carrier to provide a modular solution that accommodates a wide range of I/O requirements. The VF360 conforms to the OpenVPX standard and operates as a Payload module with System Controller capability. Both air-cooled and conduction cooled versions are available. Further flexibility is provided through build options to cater for 10 different FPGAs from Altera’s Stratix® V GX and GS device families.
- VF360 Board Support Package with Linux distribution (drivers), Sample application and Firmware Reference Design
|doc-us-dsnbk-48-1104092401-vf360-um.pdf||VF360 User Manual||04|
Board Quality Metrics
|Latest version of Quartus supported||14.1|
|Required Collateral Available|
|Reliability / Quality Assurance|
Defects per Million Opportunities (DPMO)
|Parts per Million (PPM)||10000|
|Return Material Authorization (RMA) Policy||12 months warranty|
|CE Compliant||N. CE testing not yet completed|
|Conflict Mineral Policy Compliant
|Test Plan Summary|
The Sample application tests all main functions, DDR & QDR memories, PCIe, SRIO & SERDES links \nFM500 companion FMC module with USB debug interfaces for FPGA and DSP (optional) \nVR300 companion Rear Transition module with USB debug interfaces for FPGA and DSP plus Ethernet (optional) \n3-slot OpenVPX Development Rack with power supply and fan (optional)
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