The UDPSDR-TX2 features a 14-bit DAC clocked at up to 210Msps. The TX2 is designed to be a companion transmitter to the UDPSDR-HF2 DDC Receiver also from Zephyr Engineering, Inc and the Altera Cyclone V SoCKit board from Arrow Electronics. The TX2 transmitter, HF2 receiver, HSMCMEC-AD1 adapter and SoCKit board form a complete high-performance 200kHz – 55MHz Digital Down Conversion/Digital Up Conversion transceiver. The UDPSDR-TX2 joins the UDPSDR-HF1 (14-bits@80Msps) receiver and the UDPSDR-HF2 high performance receiver (email@example.comMsps) to round out the SDRstick family.
- FPGA image for use with BeMicroCVA9 Development board and UDPSDR-HF2 to implement 200kHz - 55MHz transceiver
|doc-us-dsnbk-29-1104162206-udpsdr-tx2-users-manual-v1-1.pdf||UDPSDR-TX2 Users Manual||1.1|
Board Quality Metrics
|Latest version of Quartus supported||15.1|
|Required Collateral Available|
|Reliability / Quality Assurance|
Defects per Million Opportunities (DPMO)
|Parts per Million (PPM)||0|
|Return Material Authorization (RMA) Policy||RMA available from firstname.lastname@example.org. Authorization is required for all returns.|
|CE Compliant||N. Board is CE compliant but has not been tested. It is a piece of test equipment.|
|Conflict Mineral Policy Compliant
|Test Plan Summary|
FPGA image for BeMicroCVA9 and UDPSDR-HF2 to implement a complete 200kHz - 555MHz SDR transceiver. The SDR is compatible with HDSDR, PowerSDR, SDR# and GNU Radio software.
|ISO 9000 & 9001
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