50G Interlaken IP Core tx_lanes_aligned Signal Might Deassert Unexpectedly on Arria 10 Devices

When the 50G Interlaken IP core is configured on an Arria 10 device, it might deassert the tx_lanes_aligned signal unexpectedly. This issue occurs because by default, the IP core does not provide sufficient buffering in the path from the TX user data transfer interface to the transceiver.

To avoid this issue, set the value of the BYPASS_LOOSEFIFO RTL parameter to the value of 0. You can either edit the ilk_core_50g_150/synth/ilk_core_50g.sv file or specify the 0 value for this parameter when you instantiate the IP core.

This issue is fixed in version 15.1 of the 50G Interlaken IP core.