Article ID: 000085584 Content Type: Product Information & Documentation Last Reviewed: 09/11/2012

How do I ensure that the Nios® II instruction cache will be placed in M-RAM blocks?

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Description By selecting a size of 16 kilobytes or greater for the Nios II instruction cache, Quartus® II will automatically assign it to an M-RAM block. Caches that are any smaller than that will be assigned to M4K or M512 blocks.

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Intel® Programmable Devices