IntelliProp NVMe Host Accelerator IP Core (IPC-NV164-HI)

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

The IntelliProp NVMe Host Accelerator IP Core (IPC-NV164-HI) provides a standardized, high-speed, and ultra-efficient interface for accessing NVMe storage devices. This core is engineered to maximize NVMe SSD performance while minimizing the processing burden on the host CPU or FPGA logic fabric.

Key Features and Benefits: The accelerator is ideal for any high-speed application that requires direct, efficient, and deterministic access to NVMe storage. It achieves this by fully implementing the NVMe protocol specification, ensuring compatibility with all standard NVMe SSDs.

Host Offload: The core handles all complex NVMe command processing, queue management, and data transfer setup, offloading these resource-intensive tasks from the host processor.

Integrated DMA: Features an integrated, multi-channel Direct Memory Access (DMA) engine optimized for high-throughput, low-latency data movement between system memory and the NVMe device.

Low-...

Host Offload: The core handles all complex NVMe command processing, queue management, and data transfer setup, offloading these resource-intensive tasks from the host processor.

Integrated DMA: Features an integrated, multi-channel Direct Memory Access (DMA) engine optimized for high-throughput, low-latency data movement between system memory and the NVMe device.

Low-Latency Performance: Designed for deterministic and minimal transaction latency, crucial for mission-critical and real-time processing environments.

Target Applications:

The IPC-NV164-HI is specifically optimized for deployment in high-performance computing, data center, and high-reliability systems, including:

Computational Storage and Storage Processing Units (SPUs)

Data Center and Cloud Acceleration

5G/Telecom and Carrier Access Infrastructure

Aerospace & Defense and Medical Imaging systems

High-Speed Data Acquisition and Logging

ASIC/SoC Prototyping and Test Equipment for PCIe/NVMe products

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Key Features

Full NVMe Protocol Compliant: Implements the complete NVMe protocol stack, ensuring seamless interoperability with all standard NVMe SSDs
Host CPU/FPGA Fabric Offload: Completely handles complex NVMe command and queue management tasks, freeing up the host processor or FPGA application logic.
Integrated Multi-Channel DMA: Features a highly optimized, hardware-based Direct Memory Access (DMA) controller for maximum data throughput and efficiency.
Deterministic Low-Latency: Guarantees predictable, minimal transaction latency by executing the protocol entirely in hardware, bypassing OS and software overhead.
High-Speed PCIe Interface: Designed to support and maximize the bandwidth capabilities of PCI Express Gen4 and Gen5 platforms.
Simplified User Interface: Provides a straightforward register interface for easy control and data setup, minimizing integration complexity for the customer.
Configurable Parameters: Allows user-defined adjustments for key parameters like queue depth and size to optimize performance for specific workloads.

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Stratix® 10 GX FPGA, Stratix® 10 DX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Stratix® 10 SX SoC FPGA, Stratix® 10 AX SoC FPGA, Arria® 10 GT FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	Yes
Latest Quartus Version Supported	25.3.0
Development Language	Encrypted Verilog, Encrypted VHDL, Verilog, VHDL