Languages
English, Hindi, Urdu
AsFigo specialises in FPGA design, verification, and automation solutions with a focus on improving design reliability and verification efficiency. We have developed tools and workflows that integrate with established ecosystems, including:
• FPGALint: A configurable linting tool for FPGA code quality checks, enabling early detection of design and synthesis issues.
• OSVVM Enhancements: Contributed features such as toggle coverage support and an OSVVM code generator, BenchBot, to automate testbench creation.
• VUnit Integration: Delivered VUnit-based verification frameworks for customers, enabling structured, automated regression testing in mixed-language environments.
Altera ASAP Partnership: Recognised partner for Altera FPGA solutions, giving us direct access to device-specific optimisation flows and support.
Our experience encompasses functional verification, coverage-driven methodologies, and tool development for FPGA projects in sectors that require reliability and repeatability.
Headquarters: 71-75 Shelton Street, Covent Garden, London, England, WC2H 9JQ, United Kingdom