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Multi-point Input / Output Expander, Altera Cyclone® FPGA Design
Multi-point Input / Output Expander, Altera Cyclone® FPGA Design
By Orchid Technologies Engineering and Consulting, Inc.
NCO FPGA IP Core
Numerically Controlled Oscillator IP for discrete-time, discrete-valued representation of a sinusoidal waveform.
By Altera
Nios V Processors
Nios® V processors are the next generation of soft processor IPs, designed to bring the power and flexibility of the open-source RISC-V Architecture to FPGA environments. By leveraging the RISC-V instruction set architecture (ISA), the Nios V processors offer scalable solutions that enable a spectrum of applications ranging from simple embedded systems to complex, high-performance applications.
By Altera
nQrux® Crypto Module
Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, suitable for both microcontrollers and SoC systems.
By Xiphera Ltd.
NVMe Controller (Silicon Proven IP for Altera Devices)
The NVMe Controller is a configurable and UNH-certified solution for enterprise and client PCIe SSDs, featuring multi-core and lock-free architecture. It includes NVMe-aware DMA engines, firmware-controlled command handling, and supports AXI and proprietary interfaces. Integrated with Mobiveil’s GPEX or third-party NAND controllers, it achieves optimized latency, throughput, and efficiency.
By Mobiveil Inc.
NVMe Streamer 4.0: NVMe IP PCIe Gen4 High-speed Data Streaming - MLE FPGA Design
NVMe is a key protocol for connecting SSDs to high-performance systems, leveraging PCIe for faster read/write speeds. MLE's NVMe Streamer 4.0 is a Full Accelerator NVMe host subsystem optimized for Altera Agilex 7 F-/I-Series with F-Tiles and Agilex 5 FPGAs, built on successful customer projects. Running entirely in Programmable Logic, it bypasses the Processing System for maximum performance, using Transceivers and PCIe Hard IP Cores for seamless PCIe connectivity.
By Missing Link Electronics
NVMe Streamer 5.0: NVMe IP PCIe Gen5 High-speed Data Streaming - MLE FPGA Design
NVMe is a key protocol for connecting SSDs to high-performance systems, leveraging PCIe for faster read/write speeds. MLE's NVMe Streamer 5.0 is a Full Accelerator NVMe host subsystem optimized for Altera Agilex 7 I-Series with R-Tiles FPGAs and Agilex 5 FPGAs. Running entirely in Programmable Logic, it bypasses the Processing System for maximum performance, using Transceivers and PCIe Hard IP Cores for seamless PCIe connectivity.
By Missing Link Electronics