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CCSDS 231.0 LDPC Encoder and Decoder
The CCSDS 231.0 LDPC IP core supports the LDPC coding schemes and is an ideal fit for further applications with highest demands on forward error correction.
By Creonic GmbH
CCSDS LDPC Encoder and Decoder
The Creonic CCSDS LDPC IP cores support the LDPC coding scheme as defined by the CCSDS standard.
By Creonic GmbH
CCSDS SCCC Turbo Encoder and Decoder
The Creonic CCSDS SCCC Turbo IP core the ideal fit for further applications where high throughput and high spectral efficiency is key for operation.
By Creonic GmbH
CDC - Customizable Display Controller IP Core Family
Highly customizable MIPI-DPI compliant display controller supporting on-the-fly image composition from several input sources (images in memory or AXI4 Stream) with a powerful set of image processing features.
By TES Electronic Solutions GmbH
ChevinID
ChevinID is a silicon‑rooted authentication and protection solution designed to secure FPGA, ASIC, and embedded systems across the entire lifecycle. Built on Physically Unclonable Function (PUF) technology, ChevinID assigns each device a unique, intrinsic identity that cannot be copied or transferred, enabling strong, hardware‑level trust without external secure elements. The solution protects valuable intellectual property—including FPGA bitstreams, RTL designs, and embedded software—by binding execution and access to authenticated hardware. Cryptographic keys are securely contained within encrypted envelopes, ensuring they are never exposed during operation. This approach safeguards against cloning, reverse engineering, and unauthorized deployment. ChevinID also enables flexible, hardware‑based licensing models, allowing vendors to control feature activation, enforce usage policies, and create new revenue streams. For Intel/Altera FPGA users, ChevinID integrates seamlessly with exist
By Chevin Technology Limited
CIC FPGA IP Core
The CIC FPGA IP core offers computationally efficient cores for extracting baseband signals.
By Altera
Compact Ethernet TSN Switch 10M/100M/1G/2.5G
Comcores' compact 10M–2.5G TSN Switch IP targets automotive, avionics, and industrial use, offering IEEE TSN compliance, cut-through switching, and the lowest market gate count, with MAC learning, VLAN 802.1Q, multicast, and 802.1AS timing support.
By Comcores ApS
Cortex-A53 Software Development
Agilex® 7 and Agilex® 9 SoC implements Armv8.0 architecture which has many benefits. The training covers all new architecture features, guide engineers how to utilize the new features and optimize performance, code density, power consumption, and debug. Extensive hands-on labs to practice all necessary aspects of the CPU.
By HandsOn-Training
