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High-speed IP core for ChaCha20-Poly1305 Authenticated Encryption

ChaCha20-Poly1305 high-speed IP core deliver both encryption and authentication by combining the high-speed ChaCha20 stream cipher with the Poly1305 authenticator.

HiPrAcc™ CS200D Dual-Agilex® Computational Storage Module  

Highest performance PCIe Computational Storage Accelerator card with two Agilex AGF027 FPGAs. up to 64TB on-card NVMe storage (8x M.2 SSDs) and Gen4 PCIe switch (Broadcom) interconnect.

HiPrAcc™ NC220 Low Profile PCIe Accelerator Card

Low-profile PCIe accelerator for data centers and edge AI, with up to 400 Gbps Ethernet, x16 PCIe Gen4, Agilex® 7 FPGAs (006 through 027 density), 24/12 GB DDR4 and SMB PPS sync input

HiPrAcc™ NCS200 Networked Computational Storage Card

FPGA accelerator card featuring Agilex® 7 Series FPGA with x16 Gen4 PCIe, 4x 100G networking interfaces, four on-card Gen4 M.2 NVMe SSDs (22110 and 2280) and two DDR4 UDIMM/RDIMM/LRDIMM slots — ideal for SmartNIC, computational storage and signal/image processing.

HiPrAcc™ NCS280-I CXL/PCIe Gen5 Accelerator 

High performance CxL/PCIe Gen5 accelerator with R-Tile, dual QSFP28 based Ethernet networking, and dual on-card Gen4 M.2 NVMe SSDs

HKDF/HMAC/SHA-256 IP core

XIP3322B is a versatile IP core designed for SHA-256 cryptographic hash function with extended support for HMAC message authentication code and HKDF key derivation function that are based on using SHA-256. SHA-256 is one of the most commonly used hash functions and is used in numerous cryptographic applications.

HKDF/HMAC/SHA-384 IP core

XIP3323B is a versatile IP core designed for SHA-384 cryptographic hash function with extended support for HMAC message authentication code and HKDF key derivation function that are based on using SHA-384.

HKDF/HMAC/SHA-512 IP core

XIP3324B is a versatile IP core designed for SHA-512 cryptographic hash function with extended support for HMAC message authentication code and HKDF key derivation function that are based on using SHA-512.

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HLS, OpenCL, and RTL for AI Inference and Acceleration

This advanced course develops the skills to design, optimize, and integrate custom AI inference accelerator kernels using Altera HLS Compiler Pro, the Altera FPGA SDK for OpenCL, and RTL/SystemVerilog on Altera FPGAs.