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ST 2022-8 Core

The Nextera-Adeas ST 2022-8 core enables SDI formatted signals over IP in a ST2110 environment.

ST 2059 PTP Core

The ST 2059 PTP core is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by the Society of Motion Picture and Television Engineers. These deterministic timing signals can be used to time synchronize audio and video systems to a SMPTE ST2059 (PTP) grandmaster. The IP core provides broadcast and professional AV equipment the ability to support deterministic generation of timing (signals) for video and audio systems.

ST 2110 Core

Nextera-Adeas' industry-leading ST 2110 FPGA IP cores contain everything needed to IP-Enable your new or existing products quickly and easily. A full reference/demo design project is provided along with all of the drivers, daemons, system control software, and a Web GUI so customers can start with a working system and customize to their needs. Design services are also available to help accelerate time to market.

ST 2110 Tx/Rx IP Core

Build broadcast-grade, IP-native products - faster. Ship ST 2110 products with confidence. Macnica’s SMPTE® ST 2110 FPGA IP Core Package gives you production-proven RTL, SDKs, reference designs, and documentation - everything you need to turn Altera® SoC FPGAs into reliable, standards-compliant media nodes at 10/25/40/100 GbE.

Starter Platform for OpenVINO™ Toolkit

Starter Platform for OpenVINO™ Toolkit is a PCIe based FPGA card with high performance and competitive cost. It's equipped with the largest Cyclone V GT(or GX)device at 301K LE and it supports PCIe Gen 2 x4(GX device will support PCIe Gen 1 x4). The board comes with 1GB DDR3, 64MB SDRAM, UART-to-USB interface, and extension headers such as GPIO and Arduino. This makes Starter Platform for OpenVINO™ Toolkit a re-configurable platform with adequate computing performance and low power consumption.

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Stealth AES Encryption IP

Stealth AES IP is Pantherun’s key-exchange-free encryption engine, designed to protect against MITM, replay, and side-channel attacks, while providing post-quantum resistance for secure, future-proof communication

Stratix 10 Sensor Processing Kit

The Stratix 10 Sensor Processing Kit is designed to enable quick adoption of the Nvidia sensor processing capabilities provided within the Holoscan infrastructure. The Stratix 10 Sensor Processing Kit functionality is comprised of a vendor-agnostic FPGA IP and the software that interfaces to that IP to facilitate the processing of sensor data on GPU-enabled Nvidia host machines.

Stratix® 10 Development Kit: iG-G45D

The iG-G45D is a feature-rich Stratix® 10 SoM Development Kit designed for high-performance video, networking, and data acquisition applications. It integrates a wide range of high-speed interfaces including QSFP28, FireFly, dual FMC+ connectors, 10G SFP+, 12G SDI video input/output, and 4K HDMI 2.0 IN/OUT, enabling rapid prototyping and evaluation. With a compact 140mm x 170mm form factor and robust I/O flexibility, this platform is ideal for broadcast, defense, and high-bandwidth computing environments.

Stratix® 10 Sargon Instant-DevKit FPGA FMC+ Board

The Sargon FMC+ DevKit is a high-performance development platform based on an altera® Stratix® 10 GX FPGA, designed for embedded acceleration and industrial applications. Featuring FMC+ expansion, PCIe Gen3 x16, and optimized DDR4 memory bandwidth, it enables rapid prototyping of high-speed and data-intensive FPGA systems.