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Altera SoC Linux and Software Integration
This course covers the complete software stack for Altera SoC FPGA platforms.
By FPGA Authority
Altera® FPGA Design Services / IP Design Services - MLE
MLE offers FPGA design services for Altera® FPGAs, which give a wide variety of configurable embedded SRAM, high-speed transceivers, high-speed I/Os, logic blocks, and routing. Built-in intellectual property (IP) combined with outstanding software tools lower FPGA development time, power, and cost.
By Missing Link Electronics
AMC542
The AMC542 is based on the Stratix® 10™ GX2800 FPGA in the F1760 package and is compliant with AMC.1, AMC.2, AMC.3, and/or AMC.4 specifications.
By VADATECH, INC
Andromeda IAE50
The Andromeda IAE50 SoC module features Altera® Agilex® 5 FPGA E-Series devices with DDR5 memory, eMMC, QSPI flash, dual Gigabit Ethernet, and USB 3.1, forming a powerful embedded system. It supports vision, test and measurement, security, and communication applications with low latency and high bandwidth.
By Enclustra GmbH
Apollo Agilex® 7 SoM
Apollo Agilex® SOM takes advantage of the latest Altera® Agilex® 7 SoC FPGA with 1400K logic elements and combines high-end hardware interfaces such as high-capacity and high-bandwidth DDR4 SO-DIMM Sockets (up to 32GB DDR4), on-board QSFP28 connector, on-board USB-Blaster II, and FMC/FMC+ connectors for I/O expansion.
By Terasic Inc.
Apollo S10 SoM
Designed for modular and scalable high-performance FPGA Prototyping and HPC solutions, Apollo S10 SOM packs unbeatable performance and energy efficiency in a tiny form factor and provides up to 90X performance increase over CPUs for critical workloads such as simulation acceleration, molecular dynamics, machine learning.
By Terasic Inc.
Applied Formal Verification
This is the foundation course of a two course formal verification progression. It delivers a complete, hands-on grounding in formal methods using SystemVerilog Assertions and the Questa Formal tool flow
By FPGA Authority
ApSRAM Controller (will not be supported for FPGA devices, can be used during SoC Protyping in FPGA)
ApSRAM Controller is a low-latency, low-power IP scalable from 64Mb to 1Gb with multi-bank architecture for high throughput. Designed for AI/ML, edge, automotive, and IoT systems, it supports AXI interface and various silicon technologies. It simplifies SRAM replacement while ensuring compliance and interoperability.
By Mobiveil Inc.
Arasan I3C Dual Controller IP
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Secondary Controller logic.
By Arasan Chip Systems Inc
