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Compact Ethernet TSN Switch 10M/100M/1G/2.5G
Comcores' compact 10M–2.5G TSN Switch IP targets automotive, avionics, and industrial use, offering IEEE TSN compliance, cut-through switching, and the lowest market gate count, with MAC learning, VLAN 802.1Q, multicast, and 802.1AS timing support.
By Comcores ApS
Compute Express Link (CXL) IP
CXL IP is designed to provide the added memory bandwidth and capacity, and acceleration needed for a wide range of data-intensive workloads.
By Altera
Consulting for electrical characteristics of printed circuit boards
For signal transmission and noise problems in the development of electronic devices, especially those using Altera FPGA-based boards, we utilize our proprietary electronic measuring instruments and simulation software to identify issues and propose effective improvements.
By RITA Electronics, Ltd.
Cortex-A53 Software Development
Agilex® 7 and Agilex® 9 SoC implements Armv8.0 architecture which has many benefits. The training covers all new architecture features, guide engineers how to utilize the new features and optimize performance, code density, power consumption, and debug. Extensive hands-on labs to practice all necessary aspects of the CPU.
By HandsOn-Training
Cortex-A55 Software Development
Agilex® 5 HPS gets significant uplift, versus the prior architectures with dual Cortex-A76 plus dual Cortex-A55 plus DynamIQ Shared Unit (DSU) that forms the upgraded MPU architecture.Upgraded Application Processor Subsystem (APS). New Cache Coherency Unit (CCU), Generic Interrupt Controller (GIC), System Memory Management Unit (SMMU), and On-Chip RAM (OCRAM) that supports the new architecture
By HandsOn-Training
Cortex-A76 Software Development
Agilex® 5 implements Armv8.2 architecture which has many benefits. This training covers all new architecture features, guide engineers how to utilize the new features and optimize performance, code density, power consumption, and debug. Extensive hands-on labs to practice all necessary aspects of the CPU.
By HandsOn-Training
CPRI FPGA IP
Altera CPRI FPGA IP delivers a high-performance, standards-compliant implementation of the CPRI Specification V7.0, enabling reliable, high-speed communication between Radio Equipment Controllers (RECs) and Remote Radio Equipment (REs). Fully configurable as either REC or RE, the IP simplifies integration in remote radio network applications and accelerates deployment of robust, low-latency fronthaul links.
By Altera
CPU-less NVMe Host Controller IP core for PCIe Gen3 (NVMe IP)
NVMe-IP core is a standalone NVMe™ Host Controller designed for seamless integration with the integrated PCIe® Gen3 block on Altera FPGA devices. It eliminates the need for a CPU or external memory, simplifying system complexity while delivering high-performance NVMe SSD interfacing—ideal for applications requiring speed, simplicity, and efficiency. Included reference designs for Altera FPGA boards help accelerate NVMe storage development, reducing both time and cost.
By DesignGateway Co., Ltd.
CPU-less NVMe Host Controller IP core for PCIe Gen4 (NVMe IP)
NVMe-IP core is a standalone NVMe™ Host Controller designed for seamless integration with the P-tile on Agilex® 7 FPGA devices. It eliminates the need for a CPU or external memory, simplifying system complexity while delivering high-performance NVMe SSD interfacing—ideal for applications requiring speed, simplicity, and efficiency. Included reference designs for Altera FPGA boards help accelerate NVMe storage development, reducing both time and cost
By DesignGateway Co., Ltd.