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High-performance Debugger and Parallel Trace for Nios II (E/F/S)

PowerDebug X51 (USB3 and Ethernet) with PowerTrace III 8 GB includes Preprocessor for Nios® II, PowerView software, debug license and 1 year maintenance.

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High-performance Debugger for Agilex® 5/7 FPGA extendable for Off-Chip-Trace

PowerDebug X51 (USB3 and Ethernet) with IDC20A debug probe, PowerView software, debug license and 1 year maintenance. Extendable with PowerTrace module for Off-Chip-Trace.

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High-performance Debugger for Cyclone V™ FPGA extendable for Off-Chip-Trace

PowerDebug X51 (USB3 and Ethernet) with IDC20A debug probe, PowerView software, debug license and 1 year maintenance. Extendable with PowerTrace module for Off-Chip-Trace.

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High-Reliability FPGA Design Services

Installing functionality against soft error Implementing isolation to reduce error Support for neutron irradiation tests and consulting for soft error measures

HiPrAcc™ CS200D Dual-Agilex® Computational Storage Module  

Highest performance PCIe Computational Storage Accelerator card with two Intel Agilex AGF027 FPGAs. up to 64TB on-card NVMe storage (8x M.2 SSDs) and Gen4 PCIe switch (Broadcom) interconnect.

HiPrAcc™ NC220 Low Profile PCIe Accelerator Card

Low-profile PCIe accelerator for data centers and edge AI, with up to 400 Gbps Ethernet, x16 PCIe Gen4, Agilex® 7 FPGAs (006 through 027 density), 24/12 GB DDR4 and SMB PPS sync input

HiPrAcc™ NCS200 Networked Computational Storage Card

FPGA accelerator card featuring Agilex® 7 Series FPGA with x16 Gen4 PCIe, 4x 100G networking interfaces, four on-card Gen4 M.2 NVMe SSDs (22110 and 2280) and two DDR4 UDIMM/RDIMM/LRDIMM slots — ideal for SmartNIC, computational storage and signal/image processing.

HiPrAcc™ NCS280-I CXL/PCIe Gen5 Accelerator 

High performance CxL/PCIe Gen5 accelerator with R-Tile, dual QSFP28 based Ethernet networking, and dual on-card Gen4 M.2 NVMe SSDs

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HLS, OpenCL, and RTL for AI Inference and Acceleration

This advanced course develops the skills to design, optimize, and integrate custom AI inference accelerator kernels using Altera HLS Compiler Pro, the Altera FPGA SDK for OpenCL, and RTL/SystemVerilog on Altera FPGAs.