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INTERA HARRIER Cognit Edge AI Accelerator IP
INTERA Harrier Cognit is a high-throughput AI accelerator IP with a monolithic streaming architecture optimized for matrix-matrix operations, delivering high-speed, energy-efficient inference for demanding Edge AI and TinyML workloads. Its scalable PE arrays (from 8×8 up to 64×64) and ultra-low-power design suit industrial systems, sensing, predictive maintenance, and security, backed by INTERA’s open-source tools for seamless neural network deployment.
By INTERA Group
Interlaken IP
Interlaken is an interconnect protocol for high-speed, channelized chip-to-chip interface in networking applications. It is optimized for high-bandwidth chip-to-chip packet transfers at rates from 10 Gbps to 600 Gbps and beyond.
By Altera
Intra-vasular Ultrasound (IVUS), High Speed Data Acquisition
Intra-vasular Ultrasound (IVUS), High Speed Data Acquisition
By Orchid Technologies Engineering and Consulting, Inc.
Introduction to FPGA Design for Software Engineers
This course introduces FPGA and SoC design concepts to engineers whose primary background is software development.
By FPGA Authority
Introduction to Nios V Processors
This course provides a comprehensive introduction to the Altera Nios V soft-core processor and its ecosystem.
By FPGA Authority
Introduction to Platform Designer
This course provides a thorough introduction to Altera's Platform Designer tool and guides engineers from beginner to intermediate proficiency.
By FPGA Authority
Introduction to Verilog
This course provides a practical, hands-on foundation in using Verilog HDL for digital design.
By FPGA Authority
Introduction to VHDL
This course provides a comprehensive introduction to VHDL
By FPGA Authority
