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MAX® 10 FPGA Development Kit
DK-DEV-10M50-C: The MAX® 10 FPGA Development Kit is a versatile platform for system-level FPGA development, featuring embedded flash and dual ADCs.
By Altera
MAX® 10 Neek
The MAX 10 NEEK delivers an integrated platform that includes hardware, design tools, intellectual property and reference designs for developing a wide range of audio, video and many other exciting applications.
By Terasic Inc.
MAX® 10 Plus
As multimedia gradually becomes one of the most salient aspects of today’s computing, Terasic’s MAX 10 Plus is designed to accelerate your development of new multimedia technologies, such as audio video content analysis and recognition, media streaming, computer vision, and image processing.
By Terasic Inc.
MAX® 10-SOM-50
The MAX10 SOM has a small factor and requires very low power. The SOM is designed to be securely mounted in multiple assembly types.
By MRA Digital LLC
MAX® V CPLD Development Kit
DK-DEV-5M570ZN: The MAX® V CPLD Development Kit provides a low-cost, flexible platform for evaluating MAX V CPLDs, featuring a compact design and abundant connectivity options for rapid prototyping.
By Altera
MEP100 ST 2110 100G SmartNIC Solution
100GbE PCIe SmartNIC built on an Altera Agilex 7 FPGA that offloads SMPTE ST 2110 video, audio and data transport from the host CPU for live broadcast and ProAV systems.
By Macnica Americas
Mercury A2700 Accelerator Card
Next-Generation Platform for Accelerated Computing The Terasic Mercury A2700 accelerator card leverages the industry’s highest performance Agilex® I-Series FPGA with 2700K logic elements to address the most compute and bandwidth-demanding applications in the data center, in the cloud, and in embedded devices.
By Terasic Inc.
Mercury+ SA2 Cyclone® V SoC Module (SOM)
The Mercury+ SA2 System-on-Chip (SoC) module combines Altera's Cyclone V ARM Processor-based SoC FPGA with fast DDR3L SDRAM, quad SPI flash, a Gigabit Ethernet PHY, dual Fast Ethernet PHYs and an RTC and thus forms a high-performance embedded processing solution, combining the flexibility of a CPU system with the raw, real-time parallel processing power of an FPGA.
By Enclustra GmbH
