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N-EMB-120 OSCAR EtherCAT Master_Slave
The N-EMB-120 is a high-performance industrial platform featuring MAX®10 FPGAs. MAX 10 has a built-in sufficient RAM capacity, and since you can use FLASH for both config ROM and ROM, you can realize a custom CPU with one chip by using Nios® II. It is equipped with external SDRAM (32MByte x 16bit) and QSPI FLASH (521Mbit), but it can also be expanded according to the software application capacity. Since two 10/100 PHYs are installed on the FPGA side, it is possible to use Altera's TSEMAC IP. The board can be used in a variety of EtherCAT (hardware master and slave) applications. Hardware master: It is possible to evaluate our hardware master. It was developed as a retrofit to the existing CPU board to realize "Instant EtherCAT". Slave: It can also be used as a slave by mounting BECKHOFF's EtherCAT slave IP on the Ethernet on the FPGA side.
By NDR Co.,LTD.
N-EMB-500 RUFE ASSP BOARD
N-EMB-500-A/B is an evaluation platform for developing in-house ASSPs and dealing with discontinued ICs. It features the MAX® 10 10M08SA FPGA, which can operate on a single 3.3V power supply and has a built-in configuration ROM, enabling single-chip FPGA operation. The MAX® 10 FPGA supports dual-boot configuration and can implement Nios II processors. You can also utilize the analog functions of the MAX® 10 FPGA to manage the board's power sequencing and power management. General-purpose LEDs, DIP switches, and push switches can be freely controlled from the MAX® 10 FPGA through HDL coding.Features when combined with a baseboard:Built-in USB Blaster II: You can start development immediately without needing a separate FPGA programming device (USB Blaster II). Simply connect a USB cable between your PC and the baseboard to perform operations equivalent to a USB Blaster II. This allows programming the FPGA, GUI-based FPGA control using the System Console, and internal FPGA signal analysis
By NDR Co.,LTD.
NAND Flash Controller
The iWave NAND Flash Controller IP Core enables efficient and secure access to SLC and MLC NAND memory with built-in ECC, bad block management, and wear-leveling. It is ideal for FPGA-based storage, boot, and logging applications requiring high data integrity and flexibility.
By iWave Global
NCO FPGA IP Core
Numerically Controlled Oscillator IP for discrete-time, discrete-valued representation of a sinusoidal waveform.
By Altera
Nios V Processors
Nios® V processors are the next generation of soft processor IPs, designed to bring the power and flexibility of the open-source RISC-V Architecture to FPGA environments. By leveraging the RISC-V instruction set architecture (ISA), the Nios V processors offer scalable solutions that enable a spectrum of applications ranging from simple embedded systems to complex, high-performance applications.
By Altera
NMOS Core
Provided as a Linux daemon, the Nextera NMOS core allows devices to seamlessly interoperate with any NMOS control panel/system for ST 2110 or IPMX facilities. The core is provided with detailed documentation and examples for interfacing with custom AV over IP FPGA cores. Available cores are NMOS IS-04, IS-05, IS-07, IS-08, IS-09, IS-11, IS-13, and Secure NMOS.
By Nextera Video
nQrux® Crypto Module
Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, suitable for both microcontrollers and SoC systems.
By Xiphera Ltd.
NT400D13 SmartNIC
The Napatech SmartNIC NT400D13 is a 2x200G PCIe Gen4 card with Altera’s Agilex® AGFB022 FPGA. 18 GB DDR4 SDRAM (16 GB + ECC), PCIe Gen4 16 lanes @ 16 GT/s and 2 × QSFP56 network ports.
By Napatech
