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10GEDEK is ALSE's 10G Ethernet version of the popular GEDEK IP, including a very optimized MAC, and implements UDP, ICMP, and ARP, thus being suitable for all network configurations. It is available on all Altera FPGAs that have 10G capable transceivers including Cyclone10GX.
ALSE Advanced Logic Synthesis for Electronics
Key Features
- Processor-less 10G Ethernet stack
- 100% efficiency (back-to-back frames Rx+T at 10G, no loss)
- Memory map over Ethernet
- Works through Eth infrastructure (arp)
- Software API provided
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Latest Quartus Version Supported | 25.3.1 |
| OS Support | Linux,Windows |
| Development Language | Encrypted VHDL |
IP (encrypted RTL to full source code depending on licensing)
Reference Design
Documentation
Ordering Information
10GEDEK
from Direct
Market Segment and Sub-Segments
Aerospace
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Broadcast
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Defense
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Medical
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Test
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Transportation
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