GEDEK is ALSE's ultra compact and efficient processor-less Ethernet stack (10/100/1G/2.5G) that fits in all kinds of FPGAs down to the smallest and cheapest ones. It includes very optimized MACs (RMII,MII,GMII,RGMII,SGMII,1000-BaseX,TBI...) and it is both very flexible and configurable while being very simple to use. GEDEK implements UDP, ICMP, ARP and is suitable for all network configurations. 100% efficient : can send and receive back-to-back frames (simultaneously) with no possible loss. Connect to all kinds of PHYs (integrated MAC). A lot of useful options are available (Remote Master Port, Remote update etc).
ALSE Advanced Logic Synthesis for Electronics
Key Features
- Complete Ethernet connectivity, no processor, nothing to add, connects to any PHY
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Design Examples Available | Yes |
| Latest Quartus Version Supported | 25.3.1 |
| OS Support | Windows,Linux |
| Development Language | Encrypted VHDL |
RTL code (encrypted depends on licensing), test bench, reference designs, behavioral model, documentation, software API, PC test programs...
Ordering Information
GEDEK
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Documentation & Resources
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