.webp){kind=small}
The IEEE 802.3by‑compliant 10/25/40/100G MAC/PCS, developed in‑house by Chevin Technology, enables efficient integration of high‑speed Ethernet protocols such as TCP/IP and UDP within Altera FPGA designs while minimising resource usage. It supports ultra‑fast full‑duplex connectivity with advanced features including CRC32 error checking, cut‑through and store‑and‑forward modes for latency optimisation, and Deficit Idle Count for maximum throughput. Supported by detailed documentation, reference designs, and expert engineering services, the solution provides a reliable and flexible path to implementing high‑performance Ethernet connectivity, with configurable licensing to meet diverse project requirements.
Chevin Technology Limited
Key Features
- 10/25/40/100 Gbit Ethernet IEEE 802.3
- Small Footprint & Low latency
- Integrated FCS(CRC32) checker and generator
- Pause packet generate/accept
- With or without PCS layer - 10/25G MAC, 100MAC/PCS
- Easy to integrate, simple host interface to registers and statistics table.
Offering Brief
Offering Brief
| Device Family | Agilex® 9 FPGA Direct RF-Series |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Latest Quartus Version Supported | 25.3.1 |
| Development Language | Encrypted VHDL |
RTL – encrypted source/netlist , Documentation – Data Sheet and User Guide, Simulation – Test Bench and example use cases with vector generation
Ordering Information
CT-MAC_PCS
from Chevin Technology
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
View Sub-Segments
Broadcast
View Sub-Segments
Data Center Cloud (Public, Private, Hybrid)
View Sub-Segments
Government
View Sub-Segments
Industrial
View Sub-Segments