.webp){kind=small}
The Commsonic CMS0077 Satellite FEC Decoder has been designed specifically to meet the requirements of the DVB-S2, DVB-S2X and ISDB-S3 advanced wide-band digital satellite standards. The core integrates seamlessly with the Commsonic CMS0059 DVB-S2 / DVB-S2X / ISDB-S3 physical layer demodulator core to provide a complete satellite decoding solution. The core provides all the necessary processing steps to convert a demodulated complex I/Q signal into a standard TS output stream. If configured for ACM operation, the FEC mode can dynamically change on a frame-by-frame basis.
Commsonic Ltd
Key Features
- Supports DVB-S2: QPSK, 8-PSK, 16/32 APSK
- Supports DVB-S2X: 64/128/256-APSK
- Integrated soft-decision slicing
- Integrated LDPC and BCH decoding
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Latest Quartus Version Supported | 23.0.0 |
| Development Language | C/C++, Encrypted VHDL |
Megacore, Testbench, Documentation
Ordering Information
CMS0077
from Direct
Market Segment and Sub-Segments
Broadcast
View Sub-Segments
Government
View Sub-SegmentsImage
Test
View Sub-Segments