Creonic DVB-S2X Modulator

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The Creonic DVB-S2X modulator is a low-complexity high-performance solution that allows for symbol rates of up to 250 MSymb/s (2 Gbit/s for 256-APSK) on state-of-the-art FPGAs. The IP core performs all tasks of the inner transmitter and complements the Creonic DVB-S2X Receiver solutions (DVB-S2X Demodulator and DVB-S2X LDPC/BCH Decoder). The modulator expects BBFrames after mode adaptation as input and performs stream adaptation, FEC encoding, mapping, PL framing and modulation. The core can perform baseband interpolation and output gain adjustment. The output of the core is designed to be followed by a DAC and RF front end. Additionally, the core comes with a license option for the Creonic DVB-CID Modulator.

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Key Features

Compliant with DVB-S2 and DVB-S2X
Supports ACM, CCM, and VCM modes
Support for short and normal frames (16,200 bits and 64,800 bits)
Support for QPSK to 256-APSK
Support for very low SNR modes (VLSNR) optional

Offering Brief

Device Family	Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, MAX® 10 FPGA, MAX® V CPLD, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Latest Quartus Version Supported	22.4.0
Development Language	C/C++, Verilog, VHDL

Deliverable includes Verilog source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model

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