Design Gateway’s 10GbE MAC IP Core is a compact, cost-effective, and low-latency Ethernet MAC solution tailored for Altera FPGA platforms. Featuring full interface compatibility with Altera’s native MAC and supporting the Avalon-ST interface, it seamlessly integrates into existing systems while achieving best-in-class performance. With transmission latency as low as 19.2ns and reception latency of 44.8ns, it is ideal for real-time applications requiring deterministic Ethernet communication. Optimized for use with Design Gateway’s UDP10G-IP and TOE10G-IP, this MAC core minimizes FPGA resource usage without sacrificing throughput or reliability. Its streamlined, hardware-only design eliminates CPU dependency, enabling efficient and stable operation for aerospace, industrial, and high-frequency trading systems—all while keeping total system costs low.
DesignGateway Co., Ltd.
Key Features
- 64-bit Avalon-ST interface with full compatibility to Altera MAC
- Low latency: Tx = 19.2 ns, Rx = 44.8 ns
- Optimized for UDP10G-IP and TOE10G-IP with minimal FPGA resource usage
- Ideal for real-time, cost-sensitive, and compact FPGA applications
Offering Brief
Offering Brief
| Device Family | Arria® 10 GX FPGA, Arria® 10 SX FPGA, Cyclone® 10 GX FPGA, Stratix® 10 GX FPGA |
|---|---|
| Offering Status | Production |
| Design Examples Available | Yes |
| Demo | Yes |
| Hardware Platforms Supported | Cyclone® 10 GX FPGA Development Kit |
| Latest Quartus Version Supported | 23.1.0 |
| Development Language | Encrypted VHDL |
Encrypted IP core
Reference Designs Quartus Project
Ordering Information
NET-T10GEMAC-IP-A
from Direct
NET-T10GEMAC-IP-A
from Macnica
NET-T10GEMAC-IP-A
from Uniquest
Documentation & Resources
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