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The Super Speed AES 256 IP (AES256SS IP) from Design Gateway is a fully hardware-based AES encryption core that delivers ultra-fast and low-latency encryption processing. This core supports AES-256 in ECB mode and processes 128-bit data blocks in a single clock cycle, achieving up to 51.2Gbps throughput at 400MHz. It is ideal for applications requiring real-time processing and high-speed handling of large volumes of data. AES256SS IP operates directly on FPGA without the need for a CPU or external memory, simplifying system design and reducing power consumption and heat generation. This makes it an excellent choice for secure data transfer applications in areas such as networking equipment, storage systems, and communication infrastructure. Its high performance and efficiency are essential for demanding environments where security and speed are critical.
DesignGateway Co., Ltd.
Key Features
- Support AES ECB mode standard.
- Support 256-bit key size.
- Support input data width 128-bit.
- Throughput rate at 128Mbits/MHz.
- Speed up to 51.2 Gbps @400MHz.
- Operate 128-bit data every clock cycle.
Offering Brief
Offering Brief
| Device Family | Agilex® 7 FPGA F-Series, Arria® 10 SX FPGA |
|---|---|
| Offering Status | Production |
| Design Examples Available | Yes |
| Demo | Yes |
| Latest Quartus Version Supported | 23.1.0 |
| Development Language | Encrypted VHDL |
Encrypted IP core
Reference Designs Quartus Project
Ordering Information
NET-AES256SS-IP
from Direct
NET-AES256SS-IP
from Macnica
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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Consumer
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Imaging
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Transportation
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Automotive (Passenger Vehicles)
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Transportation Infrastructure (non-charging)