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The D68000-CPU32+ soft core is binary-compatible with the industry standard 68000’s CPU32+ version of the 32-bit microcontroller. The D68000-CPU32+ has a 32-bit data bus and a 32-bit address data bus. It is code compatible with the 68000’s CPU32+ (version of MC68020). The D68000-CPU32+ has an improved instruction set, which allows program execution with higher performance than the standard 68000 core. It contains a built-in DoCD-BDM debugger interface. The D68000-CPU32+ is delivered with a fully automated test bench and a complete set of tests, allowing easy package validation at each stage of the SoC design flow.
DCD-SEMI
Key Features
- Software compatible with industry standard 68000’s CPU32+ (68020 version)
- DoCD-BDM on-chip debugger as in CPU32+
- VBR register
- 32-bit data and address registers
- 16 addressing modes
- 5 data types supported: bits, BCD, bytes, words and long words
- Arithmetic Logic Unit includes: 8,16,32-bit arithmetic & logical operations, 16×16, 32×32 bit signed and unsigned multiplication, 32/16, 32/32, 64/32 bit signed and unsigned division, Boolean operations
- Interrupt controller: 7 priority levels interrupt controller, Unlimited number of virtual interrupt sources, Vectored and auto-vectored modes, Format $0, $2, $C exceptions support as in CPU32+
- Memory interface includes: Up to 4 GB of address space, 32-bit data bus, Asynchronous bus control
- M6800 family synchronous interface
- 3- and 2- wire bus arbitration
- Supervisor and user modes
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, MAX® V CPLD, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Latest Quartus Version Supported | 25.1.1 |
| Development Language | Encrypted VHDL, VHDL |
HDL Source Code
Testbench environment - automatic simulation macros, tests with reference responses
Synthesis scripts
Technical documentation
12 months of technical support
Ordering Information
D68000-CPU32+
from Direct
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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ASIC Proto
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Consumer
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Data Center Cloud (Public, Private, Hybrid)
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Defense
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Government
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Industrial
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Medical
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Imaging
Lab/Life Sciences
Non-Imaging Patient Devices
Other Medical
Ultrasound
Video
Image
Test
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Transportation
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Automotive (Passenger Vehicles)
Charging Infrastructure
Non-Automotive Transportation
Transportation Infrastructure (non-charging)