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The IPC-SA155A-DT allows developers to implement a fully functional SATA storage device within an Altera FPGA. By utilizing IntelliProp’s proprietary ADCI (Advanced Device Controller Interface), the core automates the complex SATA protocol and command layer, significantly reducing the firmware overhead required by the backend application. It supports industry-standard features like NCQ (Native Command Queuing) and power management, making it a robust solution for custom solid-state drives, ruggedized storage modules, and high-bandwidth data logging systems.
IntelliProp: Experts in Memory and Data Storage IP
Key Features
- Protocol: Fully compliant with SATA 3.3 (up to 6.0 Gb/s).
- Interface: Features the IntelliProp ADCI for simplified command and data management.
- Performance: Supports Native Command Queuing (NCQ) for optimized data flow.
- Backend: Simple user-side interface for easy integration with NAND flash controllers or internal memory.
- Power Management: Full support for Partial and Slumber power-save states.
- Reliability: Includes CRC error detection and comprehensive status reporting.
Offering Brief
Offering Brief
| Device Family | Agilex® 5 FPGA D-Series, Agilex® 7 FPGA F-Series, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Cyclone® V GX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Compliance | Yes |
| Latest Quartus Version Supported | 25.3.0 |
| Development Language | Encrypted Verilog, Encrypted VHDL, Verilog, VHDL |
Encrypted Verilog RTL
ModelSim/Questa verification models and testbenches
Reference Design and synthesis/Place-and-Route scripts
Comprehensive User Documentation
Constraint files specific to the target Altera FPGA family
Ordering Information
IPC-SA155A-DT
from Direct
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