.webp){kind=small}
The IPC-SA156A-HI offers a complete, verified solution for integrating SATA storage devices (HDDs/SSDs) into high-performance embedded, enterprise storage, and data acquisition systems. Utilizing the industry-standard Advanced Host Controller Interface (AHCI), the core ensures plug-and-play compatibility with existing operating system drivers, dramatically reducing software integration time. The core is designed for minimal FPGA resource utilization and maximum throughput on Altera FPGA platforms, including the Stratix®, Arria®, and Cyclone® series. It includes a comprehensive development package with an Altera reference design to accelerate customer time-to-market.
IntelliProp: Experts in Memory and Data Storage IP
Key Features
- SATA 3.3 Compliant: Fully supports the Serial ATA Revision 3.3 specification for reliable 6.0 Gb/s operation.
- AHCI Standard Interface: Implements the Advanced Host Controller Interface (AHCI) for plug-and-play compatibility with standard OS drivers (Windows, Linux).
- High-Speed Transceiver Support: Interfaces directly with the high-speed gigabit transceivers (SERDES) available on supported Altera Stratix®, Arria®, and Cyclone® GX/GT FPGA families.
- Minimal Resource Footprint: Designed for optimal logic utilization, maximizing available FPGA resources for the customer's application logic.
- Command/FIS Engine: Integrated hardware engine handles all SATA protocol tasks, including Frame Information Structures (FIS) transmission and reception, freeing the user application.
- Targeted for Storage: Ideal for embedded, industrial, defense, and enterprise data acquisition systems requiring reliable, standard SATA connectivity.
Offering Brief
Offering Brief
| Device Family | Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® V GX FPGA, Cyclone® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Demo | Yes |
| Compliance | Yes |
| Latest Quartus Version Supported | 25.1.1 |
| Development Language | Encrypted Verilog, Encrypted VHDL |
Encrypted RTL Netlist for the SATA AHCI Host Core (target Altera FPGAs).
Timing Constraints files (.sdc) optimized for Altera Quartus® Prime Pro.
Comprehensive User Documentation (integration guides, data sheets, register descriptions).
Altera FPGA Reference Design (Example design source code and scripts for immediate compilation/testing).
Dedicated Technical Support for initial integration and verification.
Ordering Information
IPC-SA156A-HI
from Direct
Documentation & Resources
Market Segment and Sub-Segments
Access
View Sub-Segments
Aerospace
View Sub-Segments
ASIC Proto
View Sub-Segments
Broadcast
View Sub-Segments
Consumer
View Sub-Segments
Data Center Cloud (Public, Private, Hybrid)
View Sub-Segments.svg?h=0&v=8a74a614-b7ba-4604-ad78-f0827c6a3874&itok=rVWXlOCO)
Defense
View Sub-Segments
Government
View Sub-Segments
Medical
View Sub-SegmentsMedical
Imaging
Lab/Life Sciences
Non-Imaging Patient Devices
Other Medical
Ultrasound
Video
Image
Test
View Sub-Segments
Transportation
View Sub-SegmentsTransportation
Automotive (Passenger Vehicles)
Charging Infrastructure
Non-Automotive Transportation
Transportation Infrastructure (non-charging)