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ST 2110 Tx/Rx IP Core

Macnica Americas

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Why teams choose Macnica's SMPTE ST 2110 Device Package - Finish integration faster: Encrypted RTL + simulation models and a complete SDK reduce bring-up time from months to weeks. - Design with headroom: Architect for 10/25/40/100 GbE today; scale to 100 GbE workflows when you’re ready. - Standards you can trust: Full ST 2110 family (video, audio, ANC), ST 2059 PTP, ST 2022-7 hitless protection, and AMWA NMOS for discovery/connection. - Fewer unknowns: Reference designs, implementation guides, and a sample driver/CUI app keep you moving from lab to line. - Proven interoperability: JT-NM Tested. Macnica has passed the applicable tests and earned the JT-NM Tested designation, with publicly documented criteria and versions for full transparency.

Key Features

  • st2110, st2059, NMOS is-04, is-05
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Offering Brief

Offering Brief

Device Family Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Stratix® 10 GX FPGA
Offering Status Production
Evaluation License Yes
Design Examples Available Yes
Compliance Yes
Intertop Reports Interop Reports
Development Language Verilog, VHDL

IP core image

Simulation model

Sample design

Documentation

Market Segment and Sub-Segments