CoaXPress-over-Fiber Bridge Host IP core

Overview Key Features Offering Brief What's Included Ordering Information Markets

Sensor to Image GmbH

Select

The CoaXPress-over-Fiber Host Bridge IP Core allows to connect a CoaXPress Host IP Core to an nGMII (10/25 Gbps Media Independent Interface) bus inside an FPGA. nGMII, as defined in IEEE Std 802.3 Clause 46, is the main access to the 10/25G Ethernet physical layer. Delivered as working reference design (when licensed with the S2I CoaXPress Host IP Core) and extensive simulation testbench

View Partner Website

Partner Product Page

Contact Now

Contact Sensor to Image GmbH

We collect personal information from you, including identifiers and geolocation data, to enhance your experience, provide customer support, and analytics. We may share this data with third-party providers. For more information, please see our Privacy Policy.

LeadSource

ASAP Account ID

Record Type Name

Key Features

Extension for CoaXPress 2.1 compliant IP for host/receiver applications
Support of multiple connections
Speed support up to 100Gbps

Offering Brief

Device Family	Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Arria® 10 GX FPGA, Cyclone® 10 GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Design Examples Available	Yes
Compliance	Yes
Intertop	JIIA Compliance Test
Latest Quartus Version Supported	24.3.1
Development Language	Encrypted VHDL, VHDL

Reference Design for Altera Evaluation Kit

Testbench

Documentation

Support

Ordering Information