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This MIPI CSI-2 Receive core seamlessly integrates with Altera's Avalon interface or directly interfaces to custom logic. It is a lightweight core, able to fit in even smaller MAX® 10 devices. Multiple cores can be instantiated into a single FPGA. Foresys fully supports the core and ensures that each engagement is successful.
Foresys Inc
Key Features
- Configurable 1, 2, or 4 lanes
- Multiple instantiations possible
- Resource friendly
- Fully Supported
Offering Brief
Offering Brief
| Device Family | Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Latest Quartus Version Supported | 25.1.0 |
| Development Language | Encrypted Verilog, Encrypted VHDL |
IP Core, Documentation, Reference Designs, SUPPORT
Ordering Information
CSI2-RX
from Direct
$0.00
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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Consumer
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Defense
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Government
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Industrial
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Medical
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